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SOCC
2008
IEEE
124views Education» more  SOCC 2008»
15 years 9 months ago
Energy minimization using a greedy randomized heuristic for the voltage assignment problem in NoC
— Scaling down the voltage levels of the processing elements (PEs) in a Network-on-Chip (NoC) can significantly reduce the computation energy consumption with an overhead of the...
Pavel Ghosh, Arunabha Sen
IEEEPACT
2007
IEEE
15 years 9 months ago
Error Detection Using Dynamic Dataflow Verification
Continued scaling of CMOS technology to smaller transistor sizes makes modern processors more susceptible to both transient and permanent hardware faults. Circuitlevel techniques ...
Albert Meixner, Daniel J. Sorin
IPPS
2007
IEEE
15 years 9 months ago
POET: Parameterized Optimizations for Empirical Tuning
The excessive complexity of both machine architectures and applications have made it difficult for compilers to statically model and predict application behavior. This observatio...
Qing Yi, Keith Seymour, Haihang You, Richard W. Vu...
CC
2007
Springer
126views System Software» more  CC 2007»
15 years 9 months ago
An Array Allocation Scheme for Energy Reduction in Partitioned Memory Architectures
This paper presents a compiler technique that reduces the energy consumption of the memory subsystem, for an off-chip partitioned memory architecture having multiple memory banks ...
K. Shyam, R. Govindarajan
CONCUR
2007
Springer
15 years 9 months ago
Asynchronous Games: Innocence Without Alternation
The notion of innocent strategy was introduced by Hyland and Ong in order to capture the interactive behaviour of λ-terms and PCF programs. An innocent strategy is defined as an ...
Paul-André Melliès, Samuel Mimram