Sciweavers

1609 search results - page 94 / 322
» Problem Structure and Dependable Architecture
Sort
View
77
Voted
DAC
1999
ACM
15 years 4 months ago
Hardware Reuse at the Behavioral Level
Standard interfaces for hardware reuse are currently de ned at the structural level. In contrast to this, our contribution de nes the reuse interface at the behavioral registertra...
Patrick Schaumont, Radim Cmar, Serge Vernalde, Mar...
113
Voted
IPPS
1999
IEEE
15 years 4 months ago
Non-Preemptive Scheduling of Real-Time Threads on Multi-Level-Context Architectures
The rapid progress in high-performance microprocessor design has made it di cult to adapt real-time scheduling results to new models of microprocessor hardware, thus leaving an un...
Jan Jonsson, Henrik Lönn, Kang G. Shin
113
Voted
IPPS
2007
IEEE
15 years 6 months ago
Experience of Optimizing FFT on Intel Architectures
Automatic library generators, such as ATLAS [11], Spiral [8] and FFTW [2], are promising technologies to generate efficient code for different computer architectures. The library...
Daniel Orozco, Liping Xue, Murat Bolat, Xiaoming L...
117
Voted
BMCBI
2004
208views more  BMCBI 2004»
15 years 13 days ago
Using 3D Hidden Markov Models that explicitly represent spatial coordinates to model and compare protein structures
Background: Hidden Markov Models (HMMs) have proven very useful in computational biology for such applications as sequence pattern matching, gene-finding, and structure prediction...
Vadim Alexandrov, Mark Gerstein
CASES
2005
ACM
15 years 2 months ago
Architectural support for real-time task scheduling in SMT processors
In Simultaneous Multithreaded (SMT) architectures most hardware resources are shared between threads. This provides a good cost/performance trade-off which renders these architec...
Francisco J. Cazorla, Peter M. W. Knijnenburg, Riz...