157 search results - page 9 / 32 » Process Variation Aware Issue Queue Design |
123
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GLVLSI
2009
IEEE
15 years 4 months ago
2009
IEEE
In this paper, we present the design of a P4 (Power-PerformanceProcess-Parasitic) aware voltage controlled oscillator (VCO) at nanoCMOS technologies. Through simulations, we have ...
110
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MICRO
2006
IEEE
15 years 6 months ago
2006
IEEE
Power delivery is a growing reliability concern in microprocessors as the industry moves toward feature-rich, powerhungrier designs. To battle the ever-aggravating power consumpti...
121
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CISS
2008
IEEE
15 years 6 months ago
2008
IEEE
— As evidenced by measurement data, channel fading and co-channel interference occur on the same time scales, and it is therefore difficult to determine if packet losses are due...
112
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TVLSI
2008
15 years 8 days ago
2008
As CMOS technology scales deeper into the nanometer regime, factors such as leakage power and chip temperature emerge as critically important concerns for high-performance VLSI des...
143
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ECRTS
2009
IEEE
14 years 10 months ago
2009
IEEE
Multicore architectures, which have multiple processing units on a single chip, have been adopted by most chip manufacturers. Most such chips contain on-chip caches that are share...