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CATA
2010
14 years 10 months ago
A Hardware Implementation of the Advanced Encryption Standard (AES) Algorithm using SystemVerilog
In this paper, a hardware implementation of the AES128 encryption algorithm is proposed. A unique feature of the proposed pipelined design is that the round keys, which are consum...
Bahram Hakhamaneshi, Behnam S. Arad
ERSA
2003
301views Hardware» more  ERSA 2003»
14 years 11 months ago
A Configurable Hardware Scheduler for Real-Time Systems
Many real-time applications require a high-resolution time tick in order to work properly. However, supporting a high-resolution time tick imposes a very high overhead on the syst...
Pramote Kuacharoen, Mohamed Shalan, Vincent John M...
LCN
2003
IEEE
15 years 3 months ago
Scheduling Resources in Programmable and Active Networks Based on Adaptive Estimations
In active and programmable networks, packet processing could be accomplished in the router within the data path. For efficient resource allocation in such networks, the packet sch...
Fariza Sabrina, Sanjay Jha
CDC
2009
IEEE
191views Control Systems» more  CDC 2009»
15 years 2 months ago
Convergence and stability of a distributed CSMA algorithm for maximal network throughput
—Designing efficient scheduling algorithms is an important problem in a general class of networks with resourcesharing constraints, such as wireless networks and stochastic proc...
Libin Jiang, Jean C. Walrand
EWSPT
1998
Springer
15 years 2 months ago
Process Technology Implications of Procurement Processes: Some Initial Observations
We report on a study of procurement processesin a large organization. The purpose of the study was to identify problems in the organization's procurementprocessesand to sugges...
Ernst Ellmer, Wolfgang Emmerich, Anthony Finkelste...