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» Processor Architectures for Ontogenesis
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ISCAS
2006
IEEE
120views Hardware» more  ISCAS 2006»
15 years 3 months ago
Architecture of a VLSI cellular processor array for synchronous/asynchronous image processing
— This paper describes a new architecture for a cellular processor array integrated circuit, which operates in both discreteand continuous-time domains. Asynchronous propagation ...
Alexey Lopich, Piotr Dudek
ICCD
2000
IEEE
80views Hardware» more  ICCD 2000»
15 years 1 months ago
Power-Sensitive Multithreaded Architecture
The power consumption of microprocessors is becoming increasingly important in design decisions, not only in mobile processors, but also now in high-performance processors. Power-...
John S. Seng, Dean M. Tullsen, George Cai
SAC
2006
ACM
15 years 3 months ago
A concurrent reactive Esterel processor based on multi-threading
Esterel is a concurrent synchronous language for developing reactive systems. As an alternative to the classical software and hardware synthesis paths, the reactive processing app...
Xin Li, Reinhard von Hanxleden
RSP
2000
IEEE
105views Control Systems» more  RSP 2000»
15 years 1 months ago
Processor Models for Retargetable Tools
This paper describes a methodology for developing processor specific tools such as assemblers, disassemblers, processor simulators, compilers etc., using processor models in a ge...
Rajat Moona
AI50
2006
15 years 1 months ago
The iCub  Cognitive Humanoid Robot: An Open-System Research Platform for Enactive Cognition
Abstract. This paper describes a multi-disciplinary initiative to promote collaborative research in enactive artificial cognitive systems by developing the iCub : a open-systems 53...
Giulio Sandini, Giorgio Metta, David Vernon