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» Processor Architectures for Ontogenesis
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APCSAC
2001
IEEE
15 years 10 months ago
Exploiting Java Instruction/Thread Level Parallelism with Horizontal Multithreading
Java bytecodes can be executed with the following three methods: a Java interpretor running on a particular machine interprets bytecodes; a Just-In-Time (JIT) compiler translates ...
Kenji Watanabe, Wanming Chu, Yamin Li
SIGMOD
2002
ACM
137views Database» more  SIGMOD 2002»
15 years 5 months ago
Partial results for online query processing
Traditional query processors generate full, accurate query results, either in batch or in pipelined fashion. We argue that this strict model is too rigid for exploratory queries o...
Vijayshankar Raman, Joseph M. Hellerstein
IPPS
2009
IEEE
16 years 27 days ago
Understanding the design trade-offs among current multicore systems for numerical computations
In this paper, we empirically evaluate fundamental design trade-offs among the most recent multicore processors and accelerator technologies. Our primary aim is to aid application...
Seunghwa Kang, David A. Bader, Richard W. Vuduc
PARELEC
2006
IEEE
16 years 7 days ago
Hierarchical Partitioning for Piecewise Linear Algorithms
processor arrays can be used as accelerators for a plenty of data flow-dominant applications. The explosive growth in research and development of massively parallel processor arr...
Hritam Dutta, Frank Hannig, Jürgen Teich
ISCAS
2006
IEEE
154views Hardware» more  ISCAS 2006»
16 years 8 days ago
FleXilicon: a reconfigurable architecture for multimedia and wireless communications
— This paper proposes a new reconfigurable architecture for multi-media and wireless communications. The proposed architecture addresses three critical design issues with the loo...
Jong-Suk Lee, Dong Sam Ha