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» Processor Architectures for Ontogenesis
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CF
2008
ACM
15 years 8 months ago
A modular 3d processor for flexible product design and technology migration
The current methodology used in mass-market processor design is to create a single base microarchitecture (e.g., Intel's "Core"or AMD's"K8") that is ...
Gabriel H. Loh
CODES
1999
IEEE
15 years 10 months ago
A unified formal model of ISA and FSMD
In this paper, we develop a formal framework to widen the scope of retargetable compilation. The goal is achieved by the unification of architectural models for both the processor...
Jianwen Zhu, Daniel Gajski
156
Voted
DAC
1996
ACM
15 years 10 months ago
Techniques for Verifying Superscalar Microprocessors
Burch and Dill [3] described an automatic method for verifying a pipelined processor against its instruction setarchitecture(ISA). We describethree techniquesfor improving this me...
Jerry R. Burch
ISCAS
2006
IEEE
122views Hardware» more  ISCAS 2006»
16 years 8 days ago
256-channel integrated neural interface and spatio-temporal signal processor
Abstract- We present an architecture and VLSI implemen- Various strategies in the analysis of spatio-temporal dynamtation of a distributed neural interface and spatio-temporal ics ...
J. N. Y. Aziz, Roman Genov, B. R. Bardakjian, M. D...
CF
2004
ACM
15 years 11 months ago
Predictable performance in SMT processors
Current instruction fetch policies in SMT processors are oriented towards optimization of overall throughput and/or fairness. However, they provide no control over how individual ...
Francisco J. Cazorla, Peter M. W. Knijnenburg, Riz...