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152
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ASPLOS
1991
ACM
15 years 8 months ago
1991
ACM
The memory consistency model supported by a multiprocessor architecture determines the amount of buffering and pipelining that may be used to hide or reduce the latency of memory ...
149
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CASES
2008
ACM
15 years 6 months ago
2008
ACM
Although CMOS feature size scaling has been the source of dramatic performance gains, it has lead to mounting reliability concerns due to increasing power densities and on-chip te...
151
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ISCA
2006
IEEE
15 years 4 months ago
2006
IEEE
Power density continues to increase exponentially with each new technology generation, posing a major challenge for thermal management in modern processors. Much past work has exa...
151
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CODES
2007
IEEE
15 years 11 months ago
2007
IEEE
We present a dynamic optimization technique, thread warping, that uses a single processor on a multiprocessor system to dynamically synthesize threads into custom accelerator circ...
142
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CODES
2005
IEEE
15 years 10 months ago
2005
IEEE
As wireless platforms converge to multimedia systems, architectures must converge to support voice, data, and video applications. From a processor architecture perspective, suppor...