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IPPS
2010
IEEE
14 years 11 months ago
A GPU-inspired soft processor for high-throughput acceleration
There is building interest in using FPGAs as accelerators for high-performance computing, but existing systems for programming them are so far inadequate. In this paper we propose...
Jeffrey Kingyens, J. Gregory Steffan
DAC
2010
ACM
14 years 12 months ago
Xetal-Pro: an ultra-low energy and high throughput SIMD processor
This paper presents Xetal-Pro SIMD processor, which is based on Xetal-II, one of the most computational-efficient (in terms of GOPS/Watt) processors available today. XetalPro supp...
Yifan He, Yu Pu, Richard P. Kleihorst, Zhenyu Ye, ...
ERSA
2009
146views Hardware» more  ERSA 2009»
14 years 11 months ago
Programming Model and Low-level Language for a Coarse-Grained Reconfigurable Multimedia Processor
We present the architecture and programming model for MORA, a coarse-grained reconfigurable processor aimed at multimedia applications. The MORA architecure is a MIMD machine consi...
Wim Vanderbauwhede, Martin Margala, Sai Rahul Chal...
HPCA
2005
IEEE
15 years 7 months ago
Power Efficient Processor Architecture and The Cell Processor
This paper provides a background and rationale for some of the architecture and design decisions in the Cell processor, a processor optimized for compute-intensive and broadband r...
H. Peter Hofstee
MICRO
2008
IEEE
107views Hardware» more  MICRO 2008»
15 years 8 months ago
A distributed processor state management architecture for large-window processors
— Processor architectures with large instruction windows have been proposed to expose more instruction-level parallelism (ILP) and increase performance. Some of the proposed arch...
Isidro Gonzalez, Marco Galluzzi, Alexander V. Veid...