378 search results - page 24 / 76 » Processor Modeling for Hardware Software Codesign |
134
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ISCA
2012
IEEE
13 years 2 months ago
2012
IEEE
Hybrid processors are HW/SW co-designed processors that leverage blocked-execution, the execution of regions of instructions as atomic blocks, to facilitate aggressive speculative...
131
Voted
ISCA
2012
IEEE
13 years 2 months ago
2012
IEEE
Data-race freedom is a valuable safety property for multithreaded programs that helps with catching bugs, simplifying memory consistency model semantics, and verifying and enforci...
121
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PLDI
2009
ACM
15 years 7 months ago
2009
ACM
Multicore designs have emerged as the mainstream design paradigm for the microprocessor industry. Unfortunately, providing multiple cores does not directly translate into performa...
96
Voted
CODES
2007
IEEE
15 years 6 months ago
2007
IEEE
This paper proposes a low power VLIW processor generation method by automatically extracting non-redundant activation conditions of pipeline registers for clock gating. It is impo...
CODES
2006
IEEE
15 years 6 months ago
2006
IEEE
Retargetable C compilers are nowadays widely used to quickly obtain compiler support for new embedded processors and to perform early processor architecture exploration. One frequ...