Sciweavers

650 search results - page 28 / 130
» Profile-Driven Cache Management
Sort
View
ISHPC
2003
Springer
15 years 2 months ago
Code and Data Transformations for Improving Shared Cache Performance on SMT Processors
Simultaneous multithreaded processors use shared on-chip caches, which yield better cost-performance ratios. Sharing a cache between simultaneously executing threads causes excessi...
Dimitrios S. Nikolopoulos
ICC
2011
IEEE
269views Communications» more  ICC 2011»
13 years 9 months ago
Experimental Evaluation of Memory Management in Content-Centric Networking
Abstract—Content-Centric Networking is a new communication architecture that rethinks the Internet communication model, designed for point-to-point connections between hosts, and...
Giovanna Carofiglio, Vinicius Gehlen, Diego Perino
ASAP
2007
IEEE
116views Hardware» more  ASAP 2007»
14 years 11 months ago
The Design of a Novel Object-oriented Processor : OOMIPS
A novel object-oriented processor is proposed in this paper, which provides support for object addressing, message passing and dynamic memory management. Object running on this pr...
Weixing Ji, Feng Shi, Baojun Qiao, Muhammad Kamran
ISCI
2002
132views more  ISCI 2002»
14 years 9 months ago
Mobile data and transaction management
Mobile computing paradigm has emerged due to advances in wireless or cellular networking technology. This rapidly expanding technology poses many challenging research problems in ...
Sanjay Kumar Madria, Mukesh K. Mohania, Sourav S. ...
ISCA
2012
IEEE
248views Hardware» more  ISCA 2012»
13 years 4 days ago
Watchdog: Hardware for safe and secure manual memory management and full memory safety
Languages such as C and C++ use unsafe manual memory management, allowing simple bugs (i.e., accesses to an object after deallocation) to become the root cause of exploitable secu...
Santosh Nagarakatte, Milo M. K. Martin, Steve Zdan...