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FPL
2009
Springer
102views Hardware» more  FPL 2009»
15 years 2 months ago
Macs: A Minimal Adaptive routing circuit-switched architecture for scalable and parametric NoCs
Networks-on-Chips (NoCs) are an emerging communication topology paradigm in single chip VLSI design, enhancing parallelism and system scalability. Processing units (PUs) connect t...
Rohit Kumar, Ann Gordon-Ross
MM
2005
ACM
215views Multimedia» more  MM 2005»
15 years 3 months ago
OpenVIDIA: parallel GPU computer vision
Graphics and vision are approximate inverses of each other: ordinarily Graphics Processing Units (GPUs) are used to convert “numbers into pictures” (i.e. computer graphics). I...
James Fung, Steve Mann
SIBGRAPI
1999
IEEE
15 years 1 months ago
Multiple Display Viewing Architecture for Virtual Environments over Heterogeneous Networks
Visualization systems that support multiple-display viewing can greatly enhance user perception. The common approach to provide multiple synchronized views uses a powerful centrali...
Alexandre G. Ferreira, Renato Cerqueira, Waldemar ...
IJISTA
2007
86views more  IJISTA 2007»
14 years 9 months ago
Implementation of a framework to integrate sensors and controllers
: A system architecture is proposed for integrating sensors, controllers, actuators and instrumentation within a common framework. The goal is to provide a flexible and scalable sy...
Ryan D. Weir, Gourab Sen Gupta, Donald G. Bailey
CLUSTER
2008
IEEE
15 years 4 months ago
SPRAT: Runtime processor selection for energy-aware computing
—A commodity personal computer (PC) can be seen as a hybrid computing system equipped with two different kinds of processors, i.e. CPU and a graphics processing unit (GPU). Since...
Hiroyuki Takizawa, Katsuto Sato, Hiroaki Kobayashi