Sciweavers

285 search results - page 23 / 57
» Programmable and Scalable Architecture for Graphics Processi...
Sort
View
HIPEAC
2009
Springer
15 years 4 months ago
Hybrid Super/Subthreshold Design of a Low Power Scalable-Throughput FFT Architecture
In this article, we present a parallel implementation of a 1024 point Fast Fourier Transform (FFT) operating with a subthreshold supply voltage, which is below the voltage that tur...
Michael B. Henry, Leyla Nazhandali
IEEECIT
2010
IEEE
14 years 7 months ago
XMalloc: A Scalable Lock-free Dynamic Memory Allocator for Many-core Machines
There are two avenues for many-core machines to gain higher performance: increasing the number of processors, and increasing the number of vector units in one SIMD processor. A tru...
Xiaohuang Huang, Christopher I. Rodrigues, Stephen...
ASPLOS
2011
ACM
14 years 1 months ago
Sponge: portable stream programming on graphics engines
Graphics processing units (GPUs) provide a low cost platform for accelerating high performance computations. The introduction of new programming languages, such as CUDA and OpenCL...
Amir Hormati, Mehrzad Samadi, Mark Woh, Trevor N. ...
SBACPAD
2008
IEEE
249views Hardware» more  SBACPAD 2008»
15 years 4 months ago
Processing Neocognitron of Face Recognition on High Performance Environment Based on GPU with CUDA Architecture
This work presents an implementation of Neocognitron Neural Network, using a high performance computing architecture based on GPU (Graphics Processing Unit). Neocognitron is an ar...
Gustavo Poli, José Hiroki Saito, Joã...
IPPS
2007
IEEE
15 years 3 months ago
Analysis of a Computational Biology Simulation Technique on Emerging Processing Architectures
1 Multi-paradigm, multi-threaded and multi-core computing devices available today provide several orders of magnitude performance improvement over mainstream microprocessors. These...
Jeremy S. Meredith, Sadaf R. Alam, Jeffrey S. Vett...