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DAC
1996
ACM
15 years 1 months ago
Using Register-Transfer Paths in Code Generation for Heterogeneous Memory-Register Architectures
In this paper we address the problem of code generation for basic blocks in heterogeneous memory-register DSP processors. We propose a new a technique, based on register-transfer ...
Guido Araujo, Sharad Malik, Mike Tien-Chien Lee
ARC
2009
Springer
137views Hardware» more  ARC 2009»
15 years 4 months ago
Heterogeneous Architecture Exploration: Analysis vs. Parameter Sweep
This paper argues the case for the use of analytical models in FPGA architecture layout exploration. We show that the problem when simplified, is amenable to formal optimization t...
Asma Kahoul, George A. Constantinides, Alastair M....
80
Voted
PLDI
1994
ACM
15 years 1 months ago
Memory Access Coalescing: A technique for Eliminating Redundant memory Accesses
As microprocessor speeds increase, memory bandwidth is increasing y the performance bottleneck for microprocessors. This has occurred because innovation and technological improvem...
Jack W. Davidson, Sanjay Jinturkar
CSMR
2000
IEEE
15 years 1 months ago
A Slicing-based Approach to Extracting Reusable Software Architectures
An alternative approach to developing reusable components from scratch is to recover them from existing systems. Although numerous techniques have been proposed to recover reusabl...
Jianjun Zhao
119
Voted
SIGOPS
2011
215views Hardware» more  SIGOPS 2011»
14 years 4 months ago
Log-based architectures: using multicore to help software behave correctly
While application performance and power-efficiency are both important, application correctness is even more important. In other words, if the application is misbehaving, it is li...
Shimin Chen, Phillip B. Gibbons, Michael Kozuch, T...