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DAC
2009
ACM
15 years 10 months ago
Efficient SAT solving for non-clausal formulas using DPLL, graphs, and watched cuts
Boolean satisfiability (SAT) solvers are used heavily in hardware and software verification tools for checking satisfiability of Boolean formulas. Most state-of-the-art SAT solver...
Himanshu Jain, Edmund M. Clarke
70
Voted
DATE
2007
IEEE
85views Hardware» more  DATE 2007»
15 years 3 months ago
QuteSAT: a robust circuit-based SAT solver for complex circuit structure
We propose a robust circuit-based Boolean Satisfiability (SAT) solver, QuteSAT, that can be applied to complex circuit netlist structure. Several novel techniques are proposed in ...
Chi-An Wu, Ting-Hao Lin, Chih-Chun Lee, Chung-Yang...
ISQED
2010
IEEE
227views Hardware» more  ISQED 2010»
15 years 4 months ago
Post-synthesis sleep transistor insertion for leakage power optimization in clock tree networks
Leakage power has grown significantly and is a major challenge in SoC design. Among SoC's components, clock distribution network power accounts for a large portion of chip po...
Houman Homayoun, Shahin Golshan, Eli Bozorgzadeh, ...
DAC
2001
ACM
15 years 10 months ago
Chaff: Engineering an Efficient SAT Solver
Boolean Satisfiability is probably the most studied of combinatorial optimization/search problems. Significant effort has been devoted to trying to provide practical solutions to ...
Matthew W. Moskewicz, Conor F. Madigan, Ying Zhao,...
IROS
2006
IEEE
136views Robotics» more  IROS 2006»
15 years 3 months ago
Multi-robot SLAM with Unknown Initial Correspondence: The Robot Rendezvous Case
Abstract— This paper presents a new approach to the multirobot map-alignment problem that enables teams of robots to build joint maps without initial knowledge of their relative ...
Xun S. Zhou, Stergios I. Roumeliotis