69 search results - page 3 / 14 » Protected IP-core test generation |
GLVLSI
2002
IEEE
13 years 11 months ago
2002
IEEE
Design simplification is becoming necessary to respect the target time-to-market of SoCs, and this goal can be obtained by using predesigned IP-cores. However, their correct inte...
FMCAD
2006
Springer
13 years 10 months ago
2006
Springer
The importance of re-usable Intellectual Properties (IPs) cores is increasing due to the growing complexity of today's system-on-chip and the need for rapid prototyping. In th...
DATE
2009
IEEE
14 years 1 months ago
2009
IEEE
—The main disadvantage of LFSR-based compression is that it should be usually combined with a constrained ATPG process, and, as a result, it cannot be effectively applied to IP c...
SBCCI
2003
ACM
13 years 11 months ago
2003
ACM
Network on Chip (NoC) is a new paradigm for designing core based System on Chips. It supports high degree of reusability and is scalable. In this paper, an efficient Two-Step Gene...
TRUSTBUS
2004
Springer
13 years 11 months ago
2004
Springer
Abstract. Synthetic data plays an important role in software testing. In this paper, we initiate the study of synthetic data generation models for the purpose of application softwa...