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» Protocol synthesis from timed and structured specifications
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95
Voted
ISSS
1999
IEEE
168views Hardware» more  ISSS 1999»
15 years 1 months ago
Automatic Architectural Synthesis of VLIW and EPIC Processors
This paper describes a mechanism for automatic design and synthesis of very long instruction word (VLIW), and its generalization, explicitly parallel instruction computing rocesso...
Shail Aditya, B. Ramakrishna Rau, Vinod Kathail
KDD
2009
ACM
364views Data Mining» more  KDD 2009»
15 years 10 months ago
Causality quantification and its applications: structuring and modeling of multivariate time series
Time series prediction is an important issue in a wide range of areas. There are various real world processes whose states vary continuously, and those processes may have influenc...
Takashi Shibuya, Tatsuya Harada, Yasuo Kuniyoshi
HYBRID
2007
Springer
15 years 1 months ago
Safety Verification of an Aircraft Landing Protocol: A Refinement Approach
Abstract. In this paper, we propose a new approach for formal verification of hybrid systems. To do so, we present a new refinement proof technique, a weak refinement using step in...
Shinya Umeno, Nancy A. Lynch
87
Voted
IMC
2007
ACM
14 years 11 months ago
Quality-of-service class specific traffic matrices in ip/mpls networks
In this paper we consider the problem of determining traffic matrices for end-to-end demands in an IP/MPLS network that supports multiple quality of service (QoS) classes. More pr...
Stefan Schnitter, Franz Hartleb, Martin Horneffer
DAC
1996
ACM
15 years 1 months ago
Combined Control Flow Dominated and Data Flow Dominated High-Level Synthesis
This paper presents the design of a Videophone CoderDecoder Motion Estimator using two High-Level Synthesis tools. Indeed, the combination of a Control Flow Dominated part (comple...
Elisabeth Berrebi, Polen Kission, Serge Vernalde, ...