: Nowadays many organisations share sensitive services through open network systems and this raises the need for an authorization framework that can interoperate even when the part...
Uche M. Mbanaso, G. S. Cooper, David W. Chadwick, ...
We propose an organization for the on-chip memory system of a chip multiprocessor, in which 16 processors share a 16MB pool of 256 L2 cache banks. The L2 cache is organized as a n...
Jaehyuk Huh, Changkyu Kim, Hazim Shafi, Lixin Zhan...
A high-performance data-path to implement DSP kernels is proposed in this paper. The data-path is based on a flexible, universal, and regular component to optimally exploiting both...
Michalis D. Galanis, George Theodoridis, Spyros Tr...
“Smart Things” are commonly understood as wireless ad-hoc networked, mobile, autonomous, special purpose computing appliances, usually interacting with their environment impli...
This paper describes the synchronization and communication primitives of the Cray T3E multiprocessor, a shared memory system scalable to 2048 processors. We discuss what we have l...