The routing channels of an FPGA consist of wire segments of various types providing the tradeoff between performance and routability. In the routing architectures of recently dev...
Seokjin Lee, Hua Xiang, D. F. Wong, Richard Y. Sun
We present a design for multi-version concurrency control and recovery in a main memory database, and describe logical and physical versioning schemes that allow read-only transac...
Rajeev Rastogi, S. Seshadri, Philip Bohannon, Denn...
In this paper, we propose an effective automatic generation approach for a Cycle-Count Accurate Memory Model (CCAMM) from the Clocked Finite State Machine (CFSM) of the Cycle Accu...
Recently, a number of frameworks were proposed to extend interface theory to the domains of single-processor and distributed real-time systems. This paper unifies some of these ap...
Lothar Thiele, Ernesto Wandeler, Nikolay Stoimenov
ACK filtering has been proposed as a technique to alleviate the congestion at the input of a slow channel located on the reverse path of a TCP connection. Old ACKs waiting at the ...