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77
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FPGA
2003
ACM
123views FPGA» more  FPGA 2003»
15 years 3 months ago
Wire type assignment for FPGA routing
The routing channels of an FPGA consist of wire segments of various types providing the tradeoff between performance and routability. In the routing architectures of recently dev...
Seokjin Lee, Hua Xiang, D. F. Wong, Richard Y. Sun
VLDB
1997
ACM
109views Database» more  VLDB 1997»
15 years 2 months ago
Logical and Physical Versioning in Main Memory Databases
We present a design for multi-version concurrency control and recovery in a main memory database, and describe logical and physical versioning schemes that allow read-only transac...
Rajeev Rastogi, S. Seshadri, Philip Bohannon, Denn...
78
Voted
CODES
2009
IEEE
15 years 2 months ago
Cycle count accurate memory modeling in system level design
In this paper, we propose an effective automatic generation approach for a Cycle-Count Accurate Memory Model (CCAMM) from the Clocked Finite State Machine (CFSM) of the Cycle Accu...
Yi-Len Lo, Mao Lin Li, Ren-Song Tsay
EMSOFT
2006
Springer
15 years 1 months ago
Real-time interfaces for composing real-time systems
Recently, a number of frameworks were proposed to extend interface theory to the domains of single-processor and distributed real-time systems. This paper unifies some of these ap...
Lothar Thiele, Ernesto Wandeler, Nikolay Stoimenov
QOFIS
2000
Springer
15 years 1 months ago
On ACK Filtering on a Slow Reverse Channel
ACK filtering has been proposed as a technique to alleviate the congestion at the input of a slow channel located on the reverse path of a TCP connection. Old ACKs waiting at the ...
Chadi Barakat, Eitan Altman