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ISCA
1997
IEEE
135views Hardware» more  ISCA 1997»
15 years 1 months ago
The Design and Analysis of a Cache Architecture for Texture Mapping
The effectiveness of texture mapping in enhancing the realism of computer generated imagery has made support for real-time texture mapping a critical part of graphics pipelines. D...
Ziyad S. Hakura, Anoop Gupta
DAC
1996
ACM
15 years 1 months ago
Optimal Clock Skew Scheduling Tolerant to Process Variations
1- A methodology is presented in this paper for determining an optimal set of clock path delays for designing high performance VLSI/ULSI-based clock distribution networks. This met...
José Luis Neves, Eby G. Friedman
DAC
2010
ACM
15 years 1 months ago
Processor virtualization and split compilation for heterogeneous multicore embedded systems
Complex embedded systems have always been heterogeneous multicore systems. Because of the tight constraints on power, performance and cost, this situation is not likely to change a...
Albert Cohen, Erven Rohou
ANCS
2006
ACM
15 years 1 months ago
Packet classification using coarse-grained tuple spaces
While the problem of high performance packet classification has received a great deal of attention in recent years, the research community has yet to develop algorithmic methods t...
Haoyu Song, Jonathan S. Turner, Sarang Dharmapurik...
CLUSTER
2004
IEEE
15 years 1 months ago
FTC-Charm++: an in-memory checkpoint-based fault tolerant runtime for Charm++ and MPI
As high performance clusters continue to grow in size, the mean time between failure shrinks. Thus, the issues of fault tolerance and reliability are becoming one of the challengi...
Gengbin Zheng, Lixia Shi, Laxmikant V. Kalé