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ERSA
2008
185views Hardware» more  ERSA 2008»
15 years 6 months ago
Design Framework for Partial Run-Time FPGA Reconfiguration
Partial reconfiguration (PR) reveals many opportunities for integration into FPGA design for potential system optimizations such as reduced area, increased performance, and increa...
Chris Conger, Ann Gordon-Ross, Alan D. George
PROLAMAT
1998
15 years 5 months ago
Design Knowledge Collection by Modeling
Since design is a process in which designers use various kinds of knowledge and it is an open-ended problem, it is difficult to prepare all necessary knowledge before design. Also...
Masaharu Yoshioka, T. Sekiya, Tetsuo Tomiyama
IE
2007
15 years 6 months ago
Observing the learning curve of videogames in architectural design
This paper presents innovative research into the use of videogame environments within architectural design studios. In this context, 3D videogame environments encourage new unders...
Greg More, Andrew Burrow
BCSHCI
2007
15 years 6 months ago
A survey on common practice in designing audio in the user interface
The current practice of designing the auditory mode in the user interface is poorly understood. In this survey, we aim at revealing the common understanding of the role of audio i...
Christopher Frauenberger, Tony Stockman, Marie-Luc...
129
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DAC
2000
ACM
16 years 5 months ago
Embedded hardware and software self-testing methodologies for processor cores
At-speed testing of GHz processors using external testers may not be technically and economically feasible. Hence, there is an emerging need for low-cost, high-quality self-test m...
Li Chen, Sujit Dey, Pablo Sanchez, Krishna Sekar, ...