2555 search results - page 378 / 511 » Quantifiers and Working Memory |
140
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DCC
2008
IEEE
16 years 3 months ago
2008
IEEE
In a previous paper we derived an upper bound on the redundancy of an arithmetic-type encoder for a memoryless source, designed to meet a finite endto-end strict delay constraint....
101
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PPOPP
2010
ACM
16 years 1 months ago
2010
ACM
We study the performance of three parallel algorithms and their hybrid variants for solving tridiagonal linear systems on a GPU: cyclic reduction (CR), parallel cyclic reduction (...
150
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EUROSYS
2006
ACM
16 years 1 months ago
2006
ACM
Many software attacks are based on injecting malicious code into a target host. This paper demonstrates the use of a wellknown technique, data tainting, to track data received fro...
121
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ICCAD
2007
IEEE
2007
IEEE
Optimal polynomial-time interprocedural register allocation for high-level synthesis and ASIP design
16 years 27 days ago
—Register allocation, in high-level synthesis and ASIP design, is the process of determining the number of registers to include in the resulting circuit or processor. The goal is...
128
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CVPR
2010
IEEE
15 years 11 months ago
2010
IEEE
We propose interest seam image, an efficient visual synopsis for video. To extract an interest seam image, a spatiotemporal energy map is constructed for the target video shot. T...