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» Queue Machines: Hardware Compilation in Hardware
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PLDI
2004
ACM
15 years 2 months ago
A generalized algorithm for graph-coloring register allocation
Graph-coloring register allocation is an elegant and extremely popular optimization for modern machines. But as currently formulated, it does not handle two characteristics common...
Michael D. Smith, Norman Ramsey, Glenn H. Holloway
MICRO
1996
IEEE
81views Hardware» more  MICRO 1996»
15 years 1 months ago
Instruction Scheduling and Executable Editing
Modern microprocessors offer more instruction-level parallelism than most programs and compilers can currently exploit. The resulting disparity between a machine's peak and a...
Eric Schnarr, James R. Larus
IEEEPACT
2008
IEEE
15 years 3 months ago
A tuning framework for software-managed memory hierarchies
Achieving good performance on a modern machine with a multi-level memory hierarchy, and in particular on a machine with software-managed memories, requires precise tuning of progr...
Manman Ren, Ji Young Park, Mike Houston, Alex Aike...
DATE
2003
IEEE
128views Hardware» more  DATE 2003»
15 years 2 months ago
Flexible and Formal Modeling of Microprocessors with Application to Retargetable Simulation
Given the growth in application-specific processors, there is a strong need for a retargetable modeling framework that is capable of accurately capturing complex processor behavi...
Wei Qin, Sharad Malik
CODES
2007
IEEE
15 years 3 months ago
Ensuring secure program execution in multiprocessor embedded systems: a case study
Multiprocessor SoCs are increasingly deployed in embedded systems with little or no security features built in. Code Injection attacks are one of the most commonly encountered sec...
Krutartha Patel, Sridevan Parameswaran, Seng Lin S...