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DATE
2003
IEEE
134views Hardware» more  DATE 2003»
15 years 2 months ago
A Multi-Level Design Flow for Incorporating IP Cores: Case Study of 1D Wavelet IP Integration
The design of high performance multimedia systems in a short time force us to use IP's blocks in many designs. However, their correct integration in a design implies more com...
Adel Baganne, Imed Bennour, Mehrez Elmarzougui, Ri...
QOSA
2007
Springer
15 years 3 months ago
A Bayesian Model for Predicting Reliability of Software Systems at the Architectural Level
: Modern society relies heavily on complex software systems for everyday activities. Dependability of these systems thus has become a critical feature that determines which product...
Roshanak Roshandel, Nenad Medvidovic, Leana Golubc...
FPT
2005
IEEE
198views Hardware» more  FPT 2005»
15 years 3 months ago
From TLM to FPGA: Rapid Prototyping with SystemC and Transaction Level Modeling
We describe a communication-centric design methodology with SystemC that allows for efficient FPGA prototype generation of transaction level models (TLM). Using a framework compr...
Wolfgang Klingauf, Robert Günzel
JUCS
2000
102views more  JUCS 2000»
14 years 9 months ago
Towards Two-Level Formal Modeling of Computer-Based Systems
: Embedded Computer-based Systems are becoming highly complex and hard to implement because of the large number of concerns the designers have to address. These systems are tightly...
Gabor Karsai, Greg Nordstrom, Ákos Lé...
MEMOCODE
2003
IEEE
15 years 2 months ago
MoDe: A Method for System-Level Architecture Evaluation
System-level design methodologies for embedded HW/SW systems face several challenges: In order to be susceptible to systematic formal analysis based on state-space exploration, a ...
Jan Romberg, Oscar Slotosch, Gabor Hahn