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ICCD
2003
IEEE
147views Hardware» more  ICCD 2003»
16 years 1 months ago
An Efficient VLIW DSP Architecture for Baseband Processing
The VLIW processors with static instruction scheduling and thus deterministic execution times are very suitable for highperformance real-time DSP applications. But the two major w...
Tay-Jyi Lin, Chin-Chi Chang, Chen-Chia Lee, Chein-...
CANDC
2009
ACM
15 years 11 months ago
A sub-symbolic model of the cognitive processes of re-representation and insight
We present a sub-symbolic computational model for effecting knowledge re-representation and insight. Given a set of data, manifold learning is used to automatically organize the d...
Dan Ventura
DATE
2003
IEEE
123views Hardware» more  DATE 2003»
15 years 9 months ago
Parallel Processing Architectures for Reconfigurable Systems
Novel reconfigurable computing architectures exploit the inherent parallelism available in many signalprocessing problems. These architectures often consist of networks of compute...
Kees A. Vissers
ICDCS
1998
IEEE
15 years 8 months ago
Experience with Secure Multi-Processing in Java
As Java is the preferred platform for the deployment of network computers, it is appealing to run multiple applications on a single Java desktop. We experimented with using the Ja...
Dirk Balfanz, Li Gong
DATE
2004
IEEE
168views Hardware» more  DATE 2004»
15 years 8 months ago
Architectures and Design Techniques for Energy Efficient Embedded DSP and Multimedia Processing
Energy efficient embedded systems consist of a heterogeneous collection of very specific building blocks, connected together by a complex network of many dedicated busses and inte...
Ingrid Verbauwhede, Patrick Schaumont, Christian P...