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DAC
1996
ACM
15 years 7 months ago
Optimal Clock Skew Scheduling Tolerant to Process Variations
1- A methodology is presented in this paper for determining an optimal set of clock path delays for designing high performance VLSI/ULSI-based clock distribution networks. This met...
José Luis Neves, Eby G. Friedman
CCGRID
2009
IEEE
15 years 10 months ago
Improving Parallel Write by Node-Level Request Scheduling
In a cluster of multiple processors or cpu-cores, many processes may run on each compute node. Each process tends to issue contiguous I/O requests for snapshot, checkpointing or s...
Kazuki Ohta, Hiroya Matsuba, Yutaka Ishikawa
119
Voted
ICC
2009
IEEE
140views Communications» more  ICC 2009»
15 years 10 months ago
Joint Scheduling and Relay Selection in One- and Two-Way Relay Networks with Buffering
— In most wireless relay networks, the source and relay nodes transmit successively via fixed time division (FTD) and each relay forwards a packet immediately upon receiving. In...
Lianghui Ding, Meixia Tao, Fan Yang, Wenjun Zhang
128
Voted
ICPADS
2006
IEEE
15 years 9 months ago
Loop Scheduling with Complete Memory Latency Hiding on Multi-core Architecture
The widening gap between processor and memory performance is the main bottleneck for modern computer systems to achieve high processor utilization. In this paper, we propose a new...
Chun Xue, Zili Shao, Meilin Liu, Mei Kang Qiu, Edw...
APCSAC
2005
IEEE
15 years 9 months ago
Irregular Redistribution Scheduling by Partitioning Messages
Abstract. Dynamic data redistribution enhances data locality and improves algorithm performance for numerous scientific problems on distributed memory multi-computers systems. Prev...
Chang Yu, Ching-Hsien Hsu, Kun-Ming Yu, Chiu-Kuo L...