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CODES
2003
IEEE
15 years 5 months ago
A modular simulation framework for architectural exploration of on-chip interconnection networks
Ever increasing complexity and heterogeneity of SoC platforms require diversified on-chip communication schemes beyond the currently omnipresent shared bus architectures. To prev...
Tim Kogel, Malte Doerper, Andreas Wieferink, Raine...
CASES
2005
ACM
15 years 2 months ago
Architectural support for real-time task scheduling in SMT processors
In Simultaneous Multithreaded (SMT) architectures most hardware resources are shared between threads. This provides a good cost/performance trade-off which renders these architec...
Francisco J. Cazorla, Peter M. W. Knijnenburg, Riz...
QOSA
2007
Springer
15 years 6 months ago
Reusable Architectural Decision Models for Enterprise Application Development
Abstract. In enterprise application development and other software construction projects, a critical success factor is to make sound architectural decisions. Text templates and too...
Olaf Zimmermann, Thomas Gschwind, Jochen Malte K&u...
101
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FPGA
2008
ACM
136views FPGA» more  FPGA 2008»
15 years 2 months ago
A complexity-effective architecture for accelerating full-system multiprocessor simulations using FPGAs
Functional full-system simulators are powerful and versatile research tools for accelerating architectural exploration and advanced software development. Their main shortcoming is...
Eric S. Chung, Eriko Nurvitadhi, James C. Hoe, Bab...
ISCA
2007
IEEE
167views Hardware» more  ISCA 2007»
15 years 7 months ago
New cache designs for thwarting software cache-based side channel attacks
Software cache-based side channel attacks are a serious new class of threats for computers. Unlike physical side channel attacks that mostly target embedded cryptographic devices,...
Zhenghong Wang, Ruby B. Lee