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CPHYSICS
2010
135views more  CPHYSICS 2010»
14 years 9 months ago
An events based algorithm for distributing concurrent tasks on multi-core architectures
In this paper, a programming model is presented which enables scalable parallel performance on multi-core shared memory architectures. The model has been developed for application...
David W. Holmes, John R. Williams, Peter Tilke
ICCV
2011
IEEE
13 years 9 months ago
Tabula Rasa: Model Transfer for Object Category Detection
Our objective is transfer training of a discriminatively trained object category detector, in order to reduce the number of training images required. To this end we propose three ...
Yusuf Aytar, Andrew Zisserman
ET
2002
90views more  ET 2002»
14 years 9 months ago
Test Wrapper and Test Access Mechanism Co-Optimization for System-on-Chip
Test access mechanisms (TAMs) and test wrappers are integral parts of a system-on-chip (SOC) test architecture. Prior research has concentrated on only one aspect of the TAM/wrappe...
Vikram Iyengar, Krishnendu Chakrabarty, Erik Jan M...
DAC
2001
ACM
15 years 10 months ago
MetaCores: Design and Optimization Techniques
Currently, hardware intellectual property (IP) is delivered at vels of abstraction: hard, firm, and soft. In order to further enhance performance, efficiency, and flexibility of I...
Seapahn Meguerdichian, Farinaz Koushanfar, Advait ...
ECCV
2010
Springer
14 years 7 months ago
Aligning Spatio-Temporal Signals on a Special Manifold
We investigate the spatio-temporal alignment of videos or features/signals extracted from them. Specifically, we formally define an alignment manifold and formulate the alignment p...
Ruonan Li, Rama Chellappa