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ARC
2010
Springer
186views Hardware» more  ARC 2010»
15 years 1 months ago
Application-Specific Signatures for Transactional Memory in Soft Processors
As reconfigurable computing hardware and in particular FPGA-based systems-on-chip comprise an increasing number of processor and accelerator cores, supporting sharing and synchroni...
Martin Labrecque, Mark Jeffrey, J. Gregory Steffan
PCRCW
1997
Springer
15 years 2 months ago
Power/Performance Trade-offs for Direct Networks
High performance portable and space-borne systems continue to demand increasing computation speeds while concurrently attempting to satisfy size, weight, and power constraints. As...
Chirag S. Patel, Sek M. Chai, Sudhakar Yalamanchil...
IPPS
2009
IEEE
15 years 4 months ago
Implementing OpenMP on a high performance embedded multicore MPSoC
In this paper we discuss our initial experiences adapting OpenMP to enable it to serve as a programming model for high performance embedded systems. A high-level programming model...
Barbara M. Chapman, Lei Huang, Eric Biscondi, Eric...
ICDCSW
2003
IEEE
15 years 3 months ago
Dynamic Resource Control for High-Speed Downlink Packet Access Wireless Channel
It is a challenging task to provide Quality of Service (QoS) control for a shared high-speed downlink packet access (HSDPA) wireless channel. In this paper, we first propose a ne...
Huai-Rong Shao, Chia Shen, Daqing Gu, Jinyun Zhang...
PPOPP
2006
ACM
15 years 4 months ago
McRT-STM: a high performance software transactional memory system for a multi-core runtime
Applications need to become more concurrent to take advantage of the increased computational power provided by chip level multiprocessing. Programmers have traditionally managed t...
Bratin Saha, Ali-Reza Adl-Tabatabai, Richard L. Hu...