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» Reducing Power Consumption in Backbone Networks
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TON
2010
93views more  TON 2010»
14 years 4 months ago
Design and field experimentation of an energy-efficient architecture for DTN throwboxes
Disruption tolerant networks rely on intermittent contacts between mobile nodes to deliver packets using a storecarry-and-forward paradigm. We earlier proposed the use of throwbox ...
Nilanjan Banerjee, Mark D. Corner, Brian Neil Levi...
MICRO
2006
IEEE
145views Hardware» more  MICRO 2006»
15 years 3 months ago
A Floorplan-Aware Dynamic Inductive Noise Controller for Reliable Processor Design
Power delivery is a growing reliability concern in microprocessors as the industry moves toward feature-rich, powerhungrier designs. To battle the ever-aggravating power consumpti...
Fayez Mohamood, Michael B. Healy, Sung Kyu Lim, Hs...
VLSID
2001
IEEE
129views VLSI» more  VLSID 2001»
15 years 10 months ago
Power-aware Multimedia Systems using Run-time Prediction
The need for low-power multimedia processing is integral to portable and embedded devices such as cell phones, wireless terminals, multimedia handhelds and PDAs. The multimedia pr...
Pavan Kumar, Mani B. Srivastava
CCR
2002
98views more  CCR 2002»
14 years 9 months ago
Efficient flooding with Passive Clustering (PC) in ad hoc networks
An ad hoc network is a fast deployable selfconfiguring wireless network characterized by node mobility, dynamic topology structure, unreliable media and limited power supply. Node...
Taek Jin Kwon, Mario Gerla
SIGCOMM
2012
ACM
13 years 9 days ago
On-chip networks from a networking perspective: congestion and scalability in many-core interconnects
In this paper, we present network-on-chip (NoC) design and contrast it to traditional network design, highlighting similarities and differences between the two. As an initial case...
George Nychis, Chris Fallin, Thomas Moscibroda, On...