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» Reducing Power in High-Performance Microprocessors
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IPPS
2007
IEEE
15 years 4 months ago
Leakage Energy Reduction in Value Predictors through Static Decay
As process technology advances toward deep submicron (below 90nm), static power becomes a new challenge to address for energy-efficient high performance processors, especially for...
Juan M. Cebrian, Juan L. Aragón, José...
MICRO
2002
IEEE
173views Hardware» more  MICRO 2002»
15 years 2 months ago
Vector vs. superscalar and VLIW architectures for embedded multimedia benchmarks
Multimedia processing on embedded devices requires an architecture that leads to high performance, low power consumption, reduced design complexity, and small code size. In this p...
Christoforos E. Kozyrakis, David A. Patterson
79
Voted
ISCAS
2007
IEEE
158views Hardware» more  ISCAS 2007»
15 years 3 months ago
Adaptive Low/High Voltage Swing CMOS Driver for On-Chip Interconnects
Abstract— This paper reports the design of a high performance, adaptive low/high swing CMOS driver circuit (mj–driver) suitable for driving of global interconnects with large c...
José C. García, Juan A. Montiel-Nels...
FAST
2011
14 years 1 months ago
CAFTL: A Content-Aware Flash Translation Layer Enhancing the Lifespan of Flash Memory based Solid State Drives
Although Flash Memory based Solid State Drive (SSD) exhibits high performance and low power consumption, a critical concern is its limited lifespan along with the associated relia...
Feng Chen, Tian Luo, Xiaodong Zhang
MICRO
2009
IEEE
178views Hardware» more  MICRO 2009»
15 years 4 months ago
Improving cache lifetime reliability at ultra-low voltages
Voltage scaling is one of the most effective mechanisms to reduce microprocessor power consumption. However, the increased severity of manufacturing-induced parameter variations a...
Zeshan Chishti, Alaa R. Alameldeen, Chris Wilkerso...