287 search results - page 9 / 58 » Reducing Power in High-Performance Microprocessors |
WSC
2008
14 years 12 months ago
2008
We present a proof-of-concept prototype for high performance spreadsheet simulation called S3. Our goal is to provide a user-friendly, yet computationally powerful simulation envi...
ICS
1997
Tsinghua U.
15 years 1 months ago
1997
Tsinghua U.
Modern microprocessors can achieve high performance on linear algebra kernels but this currently requires extensive machine-speci c hand tuning. We have developed a methodology wh...
ASIAMS
2008
IEEE
15 years 4 months ago
2008
IEEE
A carry-select adder(CSA) can be implemented by using single ripple carry adder and an add-one circuit instead of using dual ripple-carry adders to reduce the area and power but w...
HPCA
2007
IEEE
15 years 10 months ago
2007
IEEE
3D integration technology greatly increases transistor density while providing faster on-chip communication. 3D implementations of processors can simultaneously provide both laten...
CASES
2000
ACM
15 years 2 months ago
2000
ACM
We describe an automated environment to assist a system-on-achip designer to tune a microprocessor core to a particular application program that will run on the microprocessor, an...