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DATE
2007
IEEE
86views Hardware» more  DATE 2007»
14 years 15 days ago
Reduction of detected acceptable faults for yield improvement via error-tolerance
Error-tolerance is an innovative way to enhance the effective yield of IC products. Previously a test methodology based on error-rate estimation to support error-tolerance was pro...
Tong-Yu Hsieh, Kuen-Jong Lee, Melvin A. Breuer
DATE
2008
IEEE
104views Hardware» more  DATE 2008»
14 years 18 days ago
Multi-Vector Tests: A Path to Perfect Error-Rate Testing
The importance of testing approaches that exploit error tolerance to improve yield has previously been established. Error rate, defined as the percentage of vectors for which the...
Shideh Shahidi, Sandeep Gupta