407 search results - page 18 / 82 » Register-Sensitive Software Pipelining |
ISSS
1997
IEEE
15 years 6 months ago
1997
IEEE
Given a hardware/software partitioned specification and an allocation (number and type) of processors, we present an algorithm to (1) map each of the software behaviors (or tasks...
120
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CGO
2004
IEEE
15 years 5 months ago
2004
IEEE
Traditionally, software pipelining is applied either to the innermost loop of a given loop nest or from the innermost loop to the outer loops. In a companion paper, we proposed a ...
IPPS
1998
IEEE
15 years 6 months ago
1998
IEEE
Abstract. In this paper, we present a methodology for mapping an Embedded Signal Processing ESP application onto HPC platforms such that the throughput performance is maximized. Pr...
131
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DAC
1996
ACM
15 years 6 months ago
1996
ACM
Abstract -- This paper introduces a new HW/SW partitioning algorithm used in automating the instruction set processor design for pipelined ASIP (Application Specific Integrated Pro...
116
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EUROPAR
2006
Springer
15 years 5 months ago
2006
Springer
Single-dimension Software Pipelining (SSP) has been proposed as an effective software pipelining technique for multi-dimensional loops [16]. This paper introduces for the first tim...