This paper presents new technology that accelerates system verification. Traditional methods for verifying functional designs are based on logic simulation, which becomes more tim...
Young-Il Kim, Woo-Seung Yang, Young-Su Kwon, Chong...
A high accuracy system for transistor-level static timing analysis is presented. Accurate static timing verification requires that individual gate and interconnect delays be accu...
Pawan Kulshreshtha, Robert Palermo, Mohammad Morta...
The main challenge in BDD-based verification is dealing with the memory explosion problem during reachability analysis. In this paper we advocate a methodology to handle this probl...
Debashis Sahoo, Subramanian K. Iyer, Jawahar Jain,...
Egon Börger Ambient Abstract State Machines with Applications 11:00 AM Manfred Broy Realizability of System Interface Specifications 11:30 AM Ofer Strichman Proving Equivalence be...
Modeling and predicting of mental workload are among the most important issues in studying human performance in complex systems. Ample research has shown that the amplitude of the ...