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DAC
2004
ACM
15 years 1 months ago
Communication-efficient hardware acceleration for fast functional simulation
This paper presents new technology that accelerates system verification. Traditional methods for verifying functional designs are based on logic simulation, which becomes more tim...
Young-Il Kim, Woo-Seung Yang, Young-Su Kwon, Chong...
89
Voted
ICCAD
2000
IEEE
169views Hardware» more  ICCAD 2000»
15 years 1 months ago
Transistor-Level Timing Analysis Using Embedded Simulation
A high accuracy system for transistor-level static timing analysis is presented. Accurate static timing verification requires that individual gate and interconnect delays be accu...
Pawan Kulshreshtha, Robert Palermo, Mohammad Morta...
FMCAD
2004
Springer
15 years 1 months ago
A Partitioning Methodology for BDD-Based Verification
The main challenge in BDD-based verification is dealing with the memory explosion problem during reachability analysis. In this paper we advocate a methodology to handle this probl...
Debashis Sahoo, Subramanian K. Iyer, Jawahar Jain,...
BIRTHDAY
2010
Springer
15 years 2 months ago
The Arrow of Time through the Lens of Computing
Egon Börger Ambient Abstract State Machines with Applications 11:00 AM Manfred Broy Realizability of System Interface Specifications 11:30 AM Ofer Strichman Proving Equivalence be...
Krishna V. Palem
75
Voted
TSMC
2008
94views more  TSMC 2008»
14 years 9 months ago
Queuing Network Modeling of a Real-Time Psychophysiological Index of Mental Workload - P300 in Event-Related Potential (ERP)
Modeling and predicting of mental workload are among the most important issues in studying human performance in complex systems. Ample research has shown that the amplitude of the ...
Changxu Wu, Yili Liu, C. M. Quinn-Walsh