We propose an algorithm for area optimisation of sequential circuits through redundancy removal. The algorithm finds compatible redundancies by implying values over nets in the c...
Amit Mehrotra, Shaz Qadeer, Vigyan Singhal, Robert...
The goal of Intelligent RAM (IRAM) is to design a cost-effective computer by designing a processor in a memory fabrication process, instead of in a conventional logic fabrication ...
David A. Patterson, Krste Asanovic, Aaron B. Brown...
The composition tree of a given function, when it exists, provides a representation of the function revealing all possible disjunctive decompositions, thereby suggesting a realiza...
This paper introduces the current developments of the SPIF (Syst`eme de Prototypage `a Implantation rapide et Faible coˆut) project. The goal of SPIF is to provide a low cost envi...
A datapath synthesis system (DPSS) for a bus-based wavefront array architecture, called rDPA (reconfigurable datapath architecture), is presented. An internal data bus to the arra...