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» Reversible logic circuit synthesis
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ACSD
2004
IEEE
113views Hardware» more  ACSD 2004»
15 years 1 months ago
Logic Synthesis for Asynchronous Circuits Based on Petri Net Unfoldings and Incremental SAT
The behaviour of asynchronous circuits is often described by Signal Transition Graphs (STGs), which are Petri nets whose transitions are interpreted as rising and falling edges of...
Victor Khomenko, Maciej Koutny, Alexandre Yakovlev
GECCO
2005
Springer
128views Optimization» more  GECCO 2005»
15 years 3 months ago
Fractional dynamic fitness functions for GA-based circuit design
This paper proposes and analyses the performance of a Genetic Algorithm (GA) using two new concepts, namely a static fitness function including a discontinuity measure and a fract...
Cecília Reis, José António Te...
CF
2008
ACM
14 years 12 months ago
Exact combinational logic synthesis and non-standard circuit design
Using a new exact synthesizer that automatically induces minimal universal boolean function libraries, we introduce two indicators for comparing their expressiveness: the first ba...
Paul Tarau, Brenda Luderman
ISQED
2002
IEEE
103views Hardware» more  ISQED 2002»
15 years 2 months ago
Synthesis of Selectively Clocked Skewed Logic Circuits
Aiqun Cao, Naran Sirisantana, Cheng-Kok Koh, Kaush...