Sciweavers

1183 search results - page 190 / 237
» Risk Management with Benchmarking
Sort
View
ICPP
2007
IEEE
15 years 6 months ago
CPU MISER: A Performance-Directed, Run-Time System for Power-Aware Clusters
Performance and power are critical design constraints in today’s high-end computing systems. Reducing power consumption without impacting system performance is a challenge for t...
Rong Ge, Xizhou Feng, Wu-chun Feng, Kirk W. Camero...
IPPS
2007
IEEE
15 years 6 months ago
An Implementation of Page Allocation Shaping for Energy Efficiency
Main memory in many tera-scale systems requires tens of kilowatts of power. The resulting energy consumption increases system cost and the heat produced reduces reliability. Emerg...
Matthew E. Tolentino, Joseph Turner, Kirk W. Camer...
IPPS
2007
IEEE
15 years 6 months ago
Dynamic Load Balancing of Unbalanced Computations Using Message Passing
This paper examines MPI’s ability to support continuous, dynamic load balancing for unbalanced parallel applications. We use an unbalanced tree search benchmark (UTS) to compare...
James Dinan, Stephen Olivier, Gerald Sabin, Jan Pr...
ISCAS
2007
IEEE
104views Hardware» more  ISCAS 2007»
15 years 6 months ago
Reduction of Register File Delay Due to Process Variability in VLIW Embedded Processors
Process variation in future technologies can cause severe performance degradation since different parts of the shared Register File (RF) in VLIW processors may operate at various ...
Praveen Raghavan, José L. Ayala, David Atie...
FPL
2007
Springer
106views Hardware» more  FPL 2007»
15 years 6 months ago
RAMP Blue: A Message-Passing Manycore System in FPGAs
We are developing a set of reusable design blocks and several prototype systems for emulation of multi-core architectures in FPGAs. RAMP Blue is the first of these prototypes and...
Alex Krasnov, Andrew Schultz, John Wawrzynek, Greg...