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105
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ISCAS
2003
IEEE
15 years 5 months ago
2003
IEEE
Conventional ASIC designs are hard to be customized. Therefore DSP core-based ASIC design has potentially large payoff. This approach not only supports improved performance but al...
89
Voted
AUTOMATICA
2002
15 years 14 days ago
2002
Probabilistic robustness analysis and synthesis for nonlinear systems with uncertain parameters are presented. Monte Carlo simulation is used to estimate the likelihood of system ...
107
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DATE
2007
IEEE
15 years 7 months ago
2007
IEEE
As the hardware and software complexity grows, it is unlikely for the power management hardware/software to have a full observation of the entire system status. In this paper, we ...
78
Voted
LCTRTS
1998
Springer
15 years 4 months ago
1998
Springer
The Counterflow Pipeline (CFP) organization may be a good target for synthesis of application-specific microprocessors for embedded systems because it has a regular and simple str...
119
Voted
CDC
2009
IEEE
15 years 3 months ago
2009
IEEE
The paper is devoted to the stability analysis of linear time varying delay. We first model the time varying delay system as an interconnected system between a known linear trans...