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» Routing Lookups in Hardware at Memory Access Speeds
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GLOBECOM
2007
IEEE
15 years 6 months ago
Efficient TCAM Encoding Schemes for Packet Classification Using Gray Code
—Packet classification is an enabling function in Internet routers for a variety of Internet applications. In order to classify Internet packets into flows, Internet routers must...
Yeim-Kuan Chang, Cheng-Chien Su
MICRO
2003
IEEE
148views Hardware» more  MICRO 2003»
15 years 5 months ago
Fast Secure Processor for Inhibiting Software Piracy and Tampering
Due to the widespread software piracy and virus attacks, significant efforts have been made to improve security for computer systems. For stand-alone computers, a key observation...
Jun Yang 0002, Youtao Zhang, Lan Gao
ISCA
1995
IEEE
93views Hardware» more  ISCA 1995»
15 years 3 months ago
Optimizing Memory System Performance for Communication in Parallel Computers
Communicationin aparallel systemfrequently involvesmoving data from the memory of one node to the memory of another; this is the standard communication model employedin message pa...
Thomas Stricker, Thomas R. Gross
ISCA
2005
IEEE
115views Hardware» more  ISCA 2005»
15 years 5 months ago
The V-Way Cache: Demand Based Associativity via Global Replacement
As processor speeds increase and memory latency becomes more critical, intelligent design and management of secondary caches becomes increasingly important. The efficiency of curr...
Moinuddin K. Qureshi, David Thompson, Yale N. Patt
ICS
2009
Tsinghua U.
15 years 6 months ago
Cancellation of loads that return zero using zero-value caches
The speed gap between processor and memory continues to limit performance. To address this problem, we explore the potential of eliminating Zero Loads—loads accessing memory loc...
Md. Mafijul Islam, Sally A. McKee, Per Stenstr&oum...