149 search results - page 27 / 30 » Routing Lookups in Hardware at Memory Access Speeds |
ICCAD
2009
IEEE
14 years 7 months ago
2009
IEEE
The emerging Spin Torque Transfer memory (STT-RAM) is a promising candidate for future on-chip caches due to STT-RAM's high density, low leakage, long endurance and high acce...
124
Voted
HPCA
2007
IEEE
15 years 3 months ago
2007
IEEE
Shared memory multiprocessors play an increasingly important role in enterprise and scientific computing facilities. Remote misses limit the performance of shared memory applicat...
MICRO
2010
IEEE
14 years 8 months ago
2010
IEEE
SARC merges cache controller and network interface functions by relying on a single hardware primitive: each access checks the tag and the state of the addressed line for possible...
MOBISYS
2004
ACM
15 years 9 months ago
2004
ACM
ZebraNet is a mobile, wireless sensor network in which nodes move throughout an environment working to gather and process information about their surroundings [10]. As in many sen...
85
Voted
DFT
2006
IEEE
15 years 3 months ago
2006
IEEE
Control flow checking (CFC) is a well known concurrent checking technique for ensuring that a program’s instruction execution sequence follows permissible paths. Almost all CFC...