Validation of programmable architectures, consisting of processor cores, coprocessors, and memory subsystems, is one of the major bottlenecks in current Systemon-Chip design metho...
Network on Chip (NoC) is a new paradigm for designing large and complex systems on chips (SoCs). In this paradigm, a packet switched network is provided for on-chip communication. ...
In this paper, we present a multi-layered architecture for spatial and temporal agents. The focus is laid on the declarativity of the approach, which makes agent scripts expressive...
Frieder Stolzenburg, Oliver Obst, Jan Murray, Bj&o...
This paper presents the cache configuration exploration of a programmable system, in order to find the best matching between the architecture and a given application. Here, prog...
Pablo Viana, Edna Barros, Sandro Rigo, Rodolfo Aze...
SHE (Software/Hardware Engineering) is an objectoriented analysis, specification and design method for complex reactive hardware/software systems. SHE is based on the formal speci...
Jeroen Voeten, P. H. A. van der Putten, M. P. J. S...