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» SADL: Simulation Architecture Description Language
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96
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DSD
2004
IEEE
129views Hardware» more  DSD 2004»
15 years 3 months ago
Functional Validation of Programmable Architectures
Validation of programmable architectures, consisting of processor cores, coprocessors, and memory subsystems, is one of the major bottlenecks in current Systemon-Chip design metho...
Prabhat Mishra, Nikil D. Dutt
103
Voted
SDL
2003
147views Hardware» more  SDL 2003»
15 years 1 months ago
Modelling and Evaluation of a Network on Chip Architecture Using SDL
Network on Chip (NoC) is a new paradigm for designing large and complex systems on chips (SoCs). In this paradigm, a packet switched network is provided for on-chip communication. ...
Rickard Holsmark, Magnus Högberg, Shashi Kuma...
95
Voted
ROBOCUP
1999
Springer
95views Robotics» more  ROBOCUP 1999»
15 years 3 months ago
Spatial Agents Implemented in a Logical Expressible Language
In this paper, we present a multi-layered architecture for spatial and temporal agents. The focus is laid on the declarativity of the approach, which makes agent scripts expressive...
Frieder Stolzenburg, Oliver Obst, Jan Murray, Bj&o...
SBACPAD
2003
IEEE
137views Hardware» more  SBACPAD 2003»
15 years 5 months ago
Exploring Memory Hierarchy with ArchC
This paper presents the cache configuration exploration of a programmable system, in order to find the best matching between the architecture and a given application. Here, prog...
Pablo Viana, Edna Barros, Sandro Rigo, Rodolfo Aze...
91
Voted
EUROMICRO
1996
IEEE
15 years 3 months ago
Behaviour-Preserving Transformations in SHE: A Formal Approach to Architecture Design
SHE (Software/Hardware Engineering) is an objectoriented analysis, specification and design method for complex reactive hardware/software systems. SHE is based on the formal speci...
Jeroen Voeten, P. H. A. van der Putten, M. P. J. S...