261 search results - page 20 / 53 » SAT-Based Algorithms for Logic Minimization |
ASPDAC
2007
ACM
15 years 4 months ago
2007
ACM
Factoring is a logic minimization technique to represent a Boolean function in an equivalent function with minimum literals. When realizing the circuit, a function represented in ...
100
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DAC
1996
ACM
15 years 4 months ago
1996
ACM
We propose a low-overhead scan design methodology which employs a new test point insertion technique to establish scan paths through the functional logic. The technique re-uses th...
INFOCOM
2010
IEEE
14 years 10 months ago
2010
IEEE
—We investigate the design of a clean-slate control and nt plane for data networks using the abstraction of 4D architecture, utilizing and extending 4D’s concept of logically c...
146
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ACL
1990
15 years 1 months ago
1990
We describe a system of reversible grammar in which, given a logic-grammar specification of a natural language, two efficient PROLOGprograms are derived by an off-line compilation...
EURODAC
1990
IEEE
15 years 4 months ago
1990
IEEE
: In this paper logical cells and algorithms are presented supporting the design of pseudo-exhaustively testable circuits. The approach is based on real hardware segmentation, inst...