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» SAT-Based Algorithms for Logic Minimization
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JAIR
2000
105views more  JAIR 2000»
14 years 9 months ago
Reasoning on Interval and Point-based Disjunctive Metric Constraints in Temporal Contexts
We introduce a temporal model for reasoning on disjunctive metric constraints on intervals and time points in temporal contexts. This temporal model is composed of a labeled tempo...
Federico Barber
DAC
2008
ACM
15 years 10 months ago
Type-matching clock tree for zero skew clock gating
Clock skew minimization is always very important in the clock tree synthesis. Due to clock gating, the clock tree may include different types of logic gates, e.g., AND gates, OR g...
Chia-Ming Chang, Shih-Hsu Huang, Yuan-Kai Ho, Jia-...
BXML
2003
14 years 11 months ago
Rule-Based Generation of XML Schemas from UML Class Diagrams
We present an approach of how to automatically extract an XML document structure from a conceptual data model that describes the content of the document. We use UML class diagrams ...
Tobias Krumbein, Thomas Kudrass
ICCAD
2003
IEEE
148views Hardware» more  ICCAD 2003»
15 years 6 months ago
The Compositional Far Side of Image Computation
Symbolic image computation is the most fundamental computation in BDD-based sequential system optimization and formal verification. In this paper, we explore the use of over-appr...
Chao Wang, Gary D. Hachtel, Fabio Somenzi
CADE
2006
Springer
15 years 10 months ago
Inferring Network Invariants Automatically
Abstract. Verification by network invariants is a heuristic to solve uniform verification of parameterized systems. Given a system P, a network invariant for P is that abstracts th...
Olga Grinchtein, Martin Leucker, Nir Piterman