23 search results - page 3 / 5 » SOS: A Software-Oriented Distributed Shared Cache Management... |
ICS
2005
Tsinghua U.
13 years 11 months ago
2005
Tsinghua U.
We propose an organization for the on-chip memory system of a chip multiprocessor, in which 16 processors share a 16MB pool of 256 L2 cache banks. The L2 cache is organized as a n...
IEEEPACT
2009
IEEE
14 years 27 days ago
2009
IEEE
—With increasing numbers of cores, future CMPs (Chip Multi-Processors) are likely to have a tiled architecture with a portion of shared L2 cache on each tile and a bankinterleave...
ACMMSP
2006
ACM
14 years 7 days ago
2006
ACM
This paper proposes and studies a distributed L2 cache management approach through page-level data to cache slice mapping in a future processor chip comprising many cores. L2 cach...
IEEEPACT
2008
IEEE
14 years 20 days ago
2008
IEEE
This paper presents the Distributed Cooperative Caching, a scalable and energy-efficient scheme to manage chip multiprocessor (CMP) cache resources. The proposed configuration is...
PPOPP
2010
ACM
14 years 3 months ago
2010
ACM
Most modern Chip Multiprocessors (CMP) feature shared cache on chip. For multithreaded applications, the sharing reduces communication latency among co-running threads, but also r...