314 search results - page 4 / 63 » Sanity Checks in Formal Verification |
84
Voted
TCAD
2002
14 years 9 months ago
2002
Many tasks in CAD, such as equivalence checking, property checking, logic synthesis, and false paths analysis require efficient Boolean reasoning for problems derived from circuits...
67
Voted
MJ
2006
14 years 9 months ago
2006
In this paper, we describe a hybrid tool for hardware formal verification that links the HOL (higher-order logic) theorem prover and (multiway decision graphs) model checker. Our ...
83
Voted
FMCAD
2000
Springer
15 years 1 months ago
2000
Springer
Abstract. In this paper we describe the formal specification and verification of the efficient algorithm for real-time model checking implemented in the model checker RAVEN. It was...
90
Voted
IJCAI
2003
14 years 11 months ago
2003
This paper addresses the formal verification of diagnosis systems. We tackle the problem of diagnosability: given a partially observable dynamic system, and a diagnosis system obs...
AINA
2004
IEEE
15 years 1 months ago
2004
IEEE
IEEE 802.1x and authentication server based security protocols are mainly used for enhancing security of wireless networks. In this paper, we specify PAP and EAP-MD5 based securit...