242 search results - page 45 / 49 » Satellite Data Exploitation Design Architecture |
ISCA
2010
IEEE
15 years 3 months ago
2010
IEEE
The performance of future manycore processors will only scale with the number of integrated cores if there is a corresponding increase in memory bandwidth. Projected scaling of el...
ICCSA
2007
Springer
15 years 4 months ago
2007
Springer
Abstract. In this work, we develop novel file system, FRASH, for byteaddressable NVRAM (FRAM[1]) and NAND Flash device. Byte addressable NVRAM and NAND Flash is typified by the DRA...
CASES
2009
ACM
15 years 4 months ago
2009
ACM
Embedded systems are often implemented on FPGA devices and 25% of the time [2] include a soft processor— a processor built using the FPGA reprogrammable fabric. Because of their...
LCTRTS
2007
Springer
15 years 4 months ago
2007
Springer
The Instruction Register File (IRF) is an architectural extension for providing improved access to frequently occurring instructions. An optimizing compiler can exploit an IRF by ...
CF
2010
ACM
15 years 3 months ago
2010
ACM
Per-core local (scratchpad) memories allow direct inter-core communication, with latency and energy advantages over coherent cache-based communication, especially as CMP architect...