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IPPS
2007
IEEE
15 years 6 months ago
Speculative Flow Control for High-Radix Datacenter Interconnect Routers
High-radix switches are desirable building blocks for large computer interconnection networks, because they are more suitable to convert chip I/O bandwidth into low latency and lo...
Cyriel Minkenberg, Mitchell Gusat
GLOBECOM
2006
IEEE
15 years 6 months ago
On the Throughput-Cost Tradeoff of Multi-Tiered Optical Network Architectures
— In this work, we conduct a throughput-cost study of several optical network architectures: Optical Flow Switching (OFS), Tell-and-Go (TaG), Electronic Packet Switching (EPS), a...
Guy Weichenberg, Vincent W. S. Chan, Muriel M&eacu...
IJPP
2006
82views more  IJPP 2006»
14 years 12 months ago
Supporting Microthread Scheduling and Synchronisation in CMPs
Chip multiprocessors hold great promise for achieving scalability in future systems. Microthreaded chip multiprocessors add a means of exploiting legacy code in such systems. Usin...
Ian Bell, Nabil Hasasneh, Chris R. Jesshope
TVCG
2012
210views Hardware» more  TVCG 2012»
13 years 2 months ago
Scalable Multivariate Volume Visualization and Analysis Based on Dimension Projection and Parallel Coordinates
—In this paper, we present an effective and scalable system for multivariate volume data visualization and analysis with a novel transfer function interface design that tightly c...
Hanqi Guo, He Xiao, Xiaoru Yuan
SAMOS
2004
Springer
15 years 5 months ago
Scalable Instruction-Level Parallelism.
This paper presents a model for instruction-level distributed computing that allows the implementation of scalable chip multiprocessors. Based on explicit microthreading it serves ...
Chris R. Jesshope