162 search results - page 12 / 33 » Scalable and reliable communication for hardware transaction... |
CF
2010
ACM
15 years 2 months ago
2010
ACM
Per-core local (scratchpad) memories allow direct inter-core communication, with latency and energy advantages over coherent cache-based communication, especially as CMP architect...
DSN
2000
IEEE
15 years 2 months ago
2000
IEEE
Recent work has shown the advantages of using persistent memory for transaction processing. In particular, the Vista transaction system uses recoverable memory to avoid disk I/O, ...
ISCA
2006
IEEE
15 years 3 months ago
2006
IEEE
We show that the problem of communication in a quantum computer reduces to constructing reliable quantum channels by distributing high-fidelity EPR pairs. We develop analytical m...
SC
1995
ACM
15 years 1 months ago
1995
ACM
The Convex SPP-1000 is the first commercial implementation of a new generation of scalable shared memory parallel computers with full cache coherence. It employs a hierarchical s...
SIGMETRICS
1996
ACM
15 years 2 months ago
1996
ACM
A large and increasing gap exists between processor and memory speeds in scalable cache-coherent multiprocessors. To cope with this situation, programmers and compiler writers mus...