433 search results - page 27 / 87 » Scale in Chip Interconnect requires Network Technology |
CODES
2007
IEEE
15 years 4 months ago
2007
IEEE
Networks on Chip (NoC) have emerged as the design paradigm for scalable System on Chip communication infrastructure. A growing number of applications, often with firm (FRT) or so...
85
Voted
CONEXT
2009
ACM
14 years 10 months ago
2009
ACM
Shipping-container-based data centers have been introduced as building blocks for constructing mega-data centers. However, it is a challenge on how to interconnect those container...
IJCNN
2000
IEEE
15 years 2 months ago
2000
IEEE
: Conventional hardware platforms are far from reaching real-time simulation requirements of complex spiking neural networks (SNN). Therefore we designed an accelerator board with ...
SLIP
2009
ACM
15 years 4 months ago
2009
ACM
The present paper is part of a larger effort to redesign, from the ground up, the best possible interconnect topologies for switchless multiprocessor computer systems. We focus he...
SC
2005
ACM
15 years 3 months ago
2005
ACM
We address the problem of how to exploit optics for ultrascale High Performance Computing interconnect fabrics. We show that for high port counts these fabrics require multistage ...